DocumentCode
378863
Title
A 1.5 V 2.4/2.9 mW 79/50 dB DR /spl Sigma//spl Delta/ modulator for GSM/WCDMA in a 0.13 /spl mu/m digital process
Author
Gomez, G. ; Haroun, B.
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
Volume
1
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
306
Abstract
A 2/sup nd/ order multi-level /spl Sigma//spl Delta/ A/D converter for low-power multi-standard wireless receivers, in a single-poly 0.13 /spl mu/m digital CMOS process, has 79/50 dB dynamic range for GSM/WCDMA. The 0.2 mm/sup 2/ chip consumes 2.4/2.9 mW at 1.5 V.
Keywords
CMOS integrated circuits; cellular radio; code division multiple access; low-power electronics; radio receivers; sigma-delta modulation; 0.13 micron; 1.5 V; 2.4 mW; 2.9 mW; GSM/WCDMA; dynamic range; low-power multi-standard wireless receiver; second-order multi-level /spl Sigma//spl Delta/ A/D converter; single-poly digital CMOS process; Bandwidth; Capacitors; Circuits; Delta modulation; Digital modulation; Dynamic range; Feedback; GSM; Multiaccess communication; Sampling methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.993054
Filename
993054
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