Author :
Yamada, T. ; Irie, N. ; Nishimoto, J. ; Kondoh, Y. ; Nakazawa, T. ; Yamada, K. ; Tatezawa, K. ; Irita, T. ; Tamaki, S. ; Yagi, H. ; Furuyama, M. ; Ogura, K. ; Watanabe, H. ; Satomura, R. ; Hirose, K. ; Arakawa, F. ; Hattori, T. ; Kudo, I. ; Kawasaki, I. ;
Abstract :
An application processor for 3G cellular phones, using 0.18 /spl mu/m CMOS technology, includes a single CPU and DSP core with an on-chip 128 kB SRAM. It enables software-based 15 frames/s MPEG-4 encoding of QCIF Simple @L1 at 70 MHz and 140 mW. Standby current of the processor is <10 /spl mu/A in a partially powered standby mode using separate power lines.
Keywords :
CMOS digital integrated circuits; SRAM chips; cellular radio; digital signal processing chips; encoding; multimedia communication; telephone sets; 0.18 micron; 10 muA; 128 kbit; 133 MHz; 140 mW; 170 mW; 3G cellular phones; 70 MHz; CMOS technology; QCIF Simple encoding; on-chip SRAM; partially powered standby mode; separate power lines; single CPU/DSP core; software-based MPEG-4 encoding; standby application processor; standby current; Application software; Baseband; Cellular phones; Digital signal processing; Electronic mail; Encoding; Hardware; Java; MPEG 4 Standard; Random access memory;
