DocumentCode
378896
Title
A CMOS IF sampling circuit with reduced aliasing for wireless applications
Author
Levantino, S. ; Samori, C. ; Banu, M. ; Glas, J. ; Boccuzzi, V.
Author_Institution
Milan Univ., Italy
Volume
1
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
404
Abstract
An IF-sampling technique rejects even-order alias channels. A 0.25 /spl mu/m CMOS test chip demonstrates 27 dB anti-aliasing rejection, 70 dB dynamic range, and -121 dBm/Hz noise floor, for a 377 MHz IF GSM signal, with 52 MHz sampling rate.
Keywords
CMOS analogue integrated circuits; UHF integrated circuits; cellular radio; integrated circuit noise; signal sampling; 0.25 micron; 377 MHz; CMOS; IF GSM signal; IF sampling circuit; aliasing; dynamic range; even-order alias channels; noise floor; wireless applications; Attenuation; Band pass filters; Bandwidth; Circuits; Frequency conversion; GSM; Image sampling; Low pass filters; Sampling methods; Signal generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.993103
Filename
993103
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