DocumentCode :
379142
Title :
Explicit expression and simultaneous optimization of placement and routing for analog IC layouts
Author :
Kubo, Yukiko ; Nakatake, Shigetoshi ; Kajitani, Yoji ; Kawakita, Masahiro
Author_Institution :
Dept. of Inf. & Media Sci., Kitakyushu Univ., Japan
fYear :
2002
fDate :
2002
Firstpage :
467
Lastpage :
472
Abstract :
Our target is automation of analog circuit layout, which is a bottleneck in mixed-signal design. We formulate the layout explicitly considering manufacturing process, and propose an algorithm that consists of simultaneous expression and optimization of placement and routing. The key is that all the cells and wires are represented by rectangles. The algorithm is combined into a commercial tool, and the performance convinced us that the utilization shortens the design time
Keywords :
analogue integrated circuits; circuit layout CAD; circuit optimisation; integrated circuit layout; mixed analogue-digital integrated circuits; network routing; analog IC layouts; commercial tool; design time reduction; manufacturing process; mixed-signal design; placement; rectangle representation; routing; simultaneous optimization; Algorithm design and analysis; Analog circuits; Analog integrated circuits; Constraint optimization; Design automation; Integrated circuit layout; Manufacturing automation; Manufacturing processes; Routing; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.
Conference_Location :
Bangalore
Print_ISBN :
0-7695-1441-3
Type :
conf
DOI :
10.1109/ASPDAC.2002.994964
Filename :
994964
Link To Document :
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