• DocumentCode
    3792362
  • Title

    Stream-Based Trace Compression

  • Author

    A. Milenkovic;M. Milenkovic

  • Volume
    2
  • Issue
    1
  • fYear
    2003
  • Firstpage
    4
  • Lastpage
    4
  • Abstract
    Trace-driven simulation has long been used in bothprocessor and memory studies. The large size of traces motivateddifferent techniques for trace reduction. These techniques oftencombine standard compression algorithms with trace-specificsolutions, taking into account the tradeoff between reduction inthe trace size and simulation slowdown due to decompression.This paper introduces SBC, a new algorithm for instruction anddata address trace compression based on instruction streams. Theproposed technique significantly reduces trace size andsimulation time, and it is orthogonal to general compressionalgorithms. When combined with gzip, SBC reduces the size ofSPEC CPU2000 traces 94-71968 times.
  • Keywords
    "Compression algorithms","Computational modeling","Computer architecture","Computer simulation","Clocks","Redundancy","Predictive models","Instruments","Information analysis","Data mining"
  • Journal_Title
    IEEE Computer Architecture Letters
  • Publisher
    ieee
  • ISSN
    1556-6056
  • Type

    jour

  • DOI
    10.1109/L-CA.2003.7
  • Filename
    1650118