A trace driven study of packet level parallelism

Network processors promise greater flexibility and programmability for routers and switches. They typically process incoming traffic on a packet-by-packet basis. Except for the ordering constraint for packets within the same flow, most packets are independent of each other. Thus, several level of parallelism exists: packet level parallelism (PLP), intra-packet parallelism (IPP), and instruction level parallelism (ILP). Most commercial network processor implementations exploit only PLP. In this paper, we quantify how much PLP really exists. Our results show that blindly adding more processing engines to exploit PLP quickly degrades the utilization ratio. It suggests that IPP and ILP should also be exploited. Furthermore, we show that adding an input reordering buffer is a very effective technique to increase the utilization ratio.