Title :
The design of a neuro-microprocessor
Author :
J. Wawrzynek;K. Asanovic;N. Morgan
Author_Institution :
California Univ., Berkeley, CA, USA
Abstract :
The architecture of a neuro-microprocessor is presented. This processor was designed using the results of careful analysis of a set of applications and extensive simulation of moderate-precision arithmetic for back-propagation networks. Simulated performance results and test-chip results for the processor are presented. This work is an important intermediate step in the development of a connectionist network supercomputer.
Keywords :
"Arithmetic","Supercomputers","Microprocessors","Computational modeling","Application software","Computer science","Speech recognition","Process design","Analytical models","Testing"
Journal_Title :
IEEE Transactions on Neural Networks
