DocumentCode
3795983
Title
CAPCAL-a 3-D capacitance solver for support of CAD systems
Author
A. Seidl;H. Klose;M. Svoboda;J. Oberndorfer;W. Rosner
Author_Institution
Inst. fuer Festkoerpertechnol., Muenchen, West Germany
Volume
7
Issue
5
fYear
1988
Firstpage
549
Lastpage
556
Abstract
A program package is presented named CAPCAL that provides a method for calculation of the 3-D electric field distribution due to multilayer metallization of advanced VLSI (very large-scale integration) integrated circuits. The underlying physics and numerical modeling techniques used by CAPCAL are described. The finite-difference method together with a multigrid solver is used to permit easy program handling and full portability. Example capacitance calculations are presented for structures typical of the wiring of a memory cell. The influence of the line spacing and the permittivity of the passivation layer on the parasitic capacitances are also investigated. The codes developed have been tested on various computers down to the size of a microcomputer, and thus can be installed on every system currently in use for CAD.
Keywords
"Parasitic capacitance","Integrated circuit packaging","Nonhomogeneous media","Integrated circuit metallization","Very large scale integration","Large scale integration","Physics","Numerical models","Finite difference methods","Wiring"
Journal_Title
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/43.3192
Filename
3192
Link To Document