DocumentCode :
3796941
Title :
A New Design Technique, for Digital PLL Synthesizers
Author :
Eric Breeze
Author_Institution :
Fairchild Camera and Instrument Corporation Semiconductor Division
Issue :
1
fYear :
1978
Firstpage :
24
Lastpage :
33
Keywords :
"Phase locked loops","Synthesizers","Voltage-controlled oscillators","Phase detection","Phase frequency detector","Radiation detectors","Frequency conversion","Circuit stability","Leakage current","Pulse amplifiers"
Journal_Title :
IEEE Transactions on Consumer Electronics
Publisher :
ieee
ISSN :
0098-3063
Type :
jour
DOI :
10.1109/TCE.1978.266993
Filename :
4043026
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3796941
