DocumentCode :
379748
Title :
Problems due to open faults in the interconnections of self-checking data paths
Author :
Favalli, M. ; Metra, C.
Author_Institution :
Ferrara Univ., Italy
fYear :
2002
fDate :
2002
Firstpage :
612
Lastpage :
617
Abstract :
In this work, the problem of open faults affecting the interconnections of SC circuits composed by data-path and control is analyzed. In particular it is shown that, in case opens affect control signals, some problems may arise even if both control and data-path signals are concurrently checked. In particular, wrong codewords may be generated at the outputs of multiplexers and registers. To address this problem, new registers and multiplexers are proposed which allow the design data-paths which are TSC with respect to opens (and resistive opens). These components are also TSC with respect to stuck-at, transistor and gross delay faults. They present a good testability with respect to resistive bridgings
Keywords :
CMOS digital integrated circuits; VLSI; built-in self test; delays; design for testability; fault diagnosis; integrated circuit interconnections; multiplexing equipment; SC circuits; TSC; codewords; control signals; data-path signals; deep submicron ICs; gross delay faults; interconnections; multiplexers; open faults; registers; resistive bridgings; self-checking data paths; stuck-at delay faults; testability; transistor delay faults; Circuit faults; Circuit testing; Control systems; Delay; Electrical fault detection; Electronic switching systems; Fault detection; Integrated circuit interconnections; Registers; Wires;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
ISSN :
1530-1591
Print_ISBN :
0-7695-1471-5
Type :
conf
DOI :
10.1109/DATE.2002.998364
Filename :
998364
Link To Document :
بازگشت