• DocumentCode
    379755
  • Title

    Automated concurrency re-assignment in high level system models for efficient system-level simulation

  • Author

    Savoiu, Nick ; Shukla, Sandeep K. ; Gupta, Rajesh K.

  • Author_Institution
    Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    875
  • Lastpage
    881
  • Abstract
    Simple and powerful modeling of concurrency and reactivity along with their efficient implementation in the simulation kernel are crucial to the overall usefulness of system level models using the C++-based modeling frameworks. However the concurrency alignment in most modeling frameworks is naturally expressed along hardware units, being supported by the various language constructs, and the system designers express concurrency in their system models by providing threads for some modules/units of the model. Our experimental analysis shows that this concurrency model leads to inefficient simulation performance, and a concurrency alignment along dataflow gives much better simulation performance, but changes the conceptual model of hardware structures. As a result, we propose an algorithmic transformation of designs written in these C++-based environments with concurrency alignment along units/modules. This transformation, provided as a compiler front-end, will re-assign the concurrency along the dataflow, as opposed to threading along concurrent hardware/software modules, keeping the functionality of the model unchanged. Such a front-end transformation strategy will relieve hardware system designers from concerns about software engineering issues such as, threading architecture, and simulation performance, while allowing them to design in the most natural manner whereas, the simulation performance can be enhanced up to almost two times as shown in our experiments
  • Keywords
    C++ language; concurrency theory; data flow computing; high level synthesis; multi-threading; C++ language; compiler front-end transformation; concurrency re-assignment algorithm; data flow; hardware/software module; high-level system model; reactivity; simulation kernel; system design; system-level simulation; threading architecture; Algorithm design and analysis; Analytical models; Computer architecture; Concurrent computing; Hardware; Kernel; Performance analysis; Power system modeling; Software engineering; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
  • Conference_Location
    Paris
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1471-5
  • Type

    conf

  • DOI
    10.1109/DATE.2002.998404
  • Filename
    998404