DocumentCode :
379777
Title :
IDDT testing of embedded CMOS SRAMs
Author :
Kumar, Suriya Ashok ; Makki, Rafic Zein ; Binkley, David M.
Author_Institution :
North Carolina Univ., Charlotte, NC, USA
fYear :
2002
fDate :
2002
Firstpage :
1117
Abstract :
This paper presents an iDDT test method for embedded CMOS SRAMs. A total of 192 faults were inserted and simulated using parameters from a 0.35 um process. The SRAM model includes realistic effects such as wire bonding inductance and resistance parameters as well as bypass capacitance. A sensor is introduced and incorporated into the SRAM cell array to detect abnormal iDDT switching
Keywords :
CMOS memory circuits; SRAM chips; electric current measurement; fault diagnosis; integrated circuit testing; 0.35 micron; 0.35 um CMOS; IDDT switching fault; bypass capacitance; cell bridging faults; decoder faults; embedded CMOS SRAM; gate oxide shorts; opens; pattern sensitivity faults; resistance; wire bonding inductance; Bonding; Capacitance; Fault detection; Inductance; Random access memory; Semiconductor device modeling; Sensor arrays; Testing; Voltage; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
ISSN :
1530-1591
Print_ISBN :
0-7695-1471-5
Type :
conf
DOI :
10.1109/DATE.2002.998473
Filename :
998473
Link To Document :
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