Title :
A voltage dependent capacitance model including effects of manufacturing process variabilities on voltage coefficients
Author_Institution :
Semicond. Sector, Harris Corp., Melbourne, FL, USA
Abstract :
A voltage dependent capacitance model, including the effects of process variations, has been developed using a voltage-controlled voltage source defined by a polynomial for Monte Carlo simulations of mixed-signal design applications. Each of the polynomial coefficients is defined by a simple first order polynomial using the process variables to accurately reflect the manufacturing process. The variability of voltage coefficient simulated by this mixed mode model is shown to be in good agreement with the empirical data.
Keywords :
"Voltage","Capacitance","Manufacturing processes","Capacitors","Polynomials","Doping","Integrated circuit modeling","Circuit simulation","Circuit synthesis","Signal design"
Journal_Title :
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems