DocumentCode :
3798561
Title :
Gate-Level Simulation
Volume :
2
Issue :
6
fYear :
1985
Firstpage :
63
Lastpage :
71
Keywords :
"Tutorials","Circuit simulation","Logic design","Process design","Very large scale integration","User interfaces","Multivalued logic","Space vector pulse width modulation","Pulse inverters"
Journal_Title :
IEEE Design & Test of Computers
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.1985.294802
Filename :
4069703
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3798561
