• DocumentCode
    3801000
  • Title

    A Fully Differential Low-Power Divide-by-8 Injection-Locked Frequency Divider Up to 18 GHz

  • Author

    Shanfeng Cheng;Haitao Tong;Jose Silva-Martinez;Aydn lker Karsilayan

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, USA
  • Volume
    42
  • Issue
    3
  • fYear
    2007
  • Firstpage
    583
  • Lastpage
    591
  • Abstract
    A low power divide-by-8 injection-locked frequency divider is presented. The frequency divider consists of four current-mode logic (CML) D-latches connected in the form of a four-stage ring with the differential input signal injected into the clock terminals of the latches. The output signals can be taken from the data terminals of any of the four latches. The proposed frequency divider has higher operating frequency and lower power dissipation compared with conventional static frequency dividers. Compared with existing injection-locked frequency dividers, the proposed fully differential frequency divider presents wider locking range with the center frequency independent of injection amplitude. The frequency divider is implemented in TSMC 0.18 mum CMOS technology. It consumes around 3.6 mW power with 1.8 V supply. The operating frequency can be tuned from 4 GHz to 18 GHz. The ratio of the locking range over the center frequency is up to 50% depending on the operating frequency and biasing conditions.
  • Keywords
    "Frequency conversion","Power dissipation","CMOS technology","Voltage-controlled oscillators","CMOS logic circuits","Clocks","Bandwidth","Mobile communication","Batteries","Logic design"
  • Journal_Title
    IEEE Journal of Solid-State Circuits
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2006.891448
  • Filename
    4114744