DocumentCode :
3810239
Title :
Erratum: VLSI implementation of a 5-trit full adder
Author :
H.T. Mouftah
Author_Institution :
Queen´s University, Department of Electrical Engineering, Kingston, Canada
Volume :
133
Issue :
1
fYear :
1986
fDate :
2/1/1986 12:00:00 AM
Firstpage :
38
Journal_Title :
IEE Proceedings G - Electronic Circuits and Systems
Publisher :
iet
ISSN :
0143-7089
Type :
jour
DOI :
10.1049/ip-g-1.1986.0007
Filename :
4646717
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=3810239
