Square-rooting and vector summation circuits using current conveyors

New analogue squaring, square-rooting and vector summation circuits using current conveyors (CCIIs) are presented. They consist of MOS transistors biased in the triode region, a buffered unity-gain inverting amplifier, resistors and CCIIs. A general n-input vector summation circuit is also proposed. The proposed squaring, square-rooting circuits and a two-input vector summation circuit have been implemented using commercial CCIIs and transistor arrays. Its -3 dB bandwidth is measured to be about 400 kHz. The proposed circuits are expected to be useful in analogue signal-processing applications.