• DocumentCode
    381326
  • Title

    Enabling technologies for integrated system-on-a-package for the next generation aerospace applications

  • Author

    Young, Jedediah J. ; Malshe, Ajay P. ; Brown, W.D. ; Lenihan, Timothy ; Albert, Douglas ; Ozguz, Volkan

  • Author_Institution
    Dept. of Mech. Eng., Arkansas Univ., Fayetteville, AR, USA
  • Volume
    5
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    101295
  • Abstract
    Since the trend for electronic systems now requires more functional density not only per unit area, but also per unit volume, and as electronic systems become smaller and thinner, the next logical step is to thin the integrated circuit (IC). This paper looks at the mechanical and morphological effects of the thinning process on the IC, and discusses thermal management schemes used to operate the thinned IC at higher power levels. The methods used for thinning the chips in this study are plasma etching and mechanical polishing. The chips were thinned to a thickness of approximately 50-80 microns. This paper compares the effects of these two thinning processes on the chip´s surface morphology and mechanical properties. In addition to the physical analysis of the chip, different thermal management schemes are also investigated in order to help increase the chip´s operating power in both the flip chip and wire bond configurations. Polyimide is a desirable substrate for conformal circuitry because of its mechanical flexibility, yet it is a poor conductor of heat. Therefore, the thermal management schemes must be integrated into the polyimide substrate in order to increase the flow of heat away from the chips. The investigated schemes are thermal vias and micro heat channels. Finite element analysis was used to model these thermal management schemes.
  • Keywords
    aerospace instrumentation; finite element analysis; flip-chip devices; integrated circuit bonding; integrated circuit manufacture; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; lead bonding; polishing; sputter etching; thermal analysis; thermal management (packaging); 50 to 80 micron; FEA; aerospace applications; chip cooling; chip operating power; chip surface morphology/mechanical properties; chip thickness; conformal circuitry polyimide substrates; finite element analysis; flip chips; heat conductors; heat flow; high power thinned IC thermal management schemes; integrated circuit thinning; integrated system-on-a-package enabling technologies; mechanical flexibility; mechanical polishing; mechanical/morphological thinning process effects; micro heat channels; plasma etching; thermal modeling/analysis; thermal vias; wire bond configuration; Energy management; Etching; Integrated circuit technology; Plasma applications; Plasma properties; Polyimides; Power system management; Surface morphology; Thermal management; Thermal management of electronics;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Aerospace Conference Proceedings, 2002. IEEE
  • Print_ISBN
    0-7803-7231-X
  • Type

    conf

  • DOI
    10.1109/AERO.2002.1035384
  • Filename
    1035384