FPGA Implementation of an Adaptive Filter Robust to Impulsive Noise: Two Approaches

Adaptive filters are used in a wide range of applications such as echo cancellation, noise cancellation, system identification, and prediction. Its hardware implementation becomes essential in many cases where real-time execution is needed. However, impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms, particularly in specific hardware platforms. Field-programmable gate arrays (FPGAs) are used widely for real-time applications where timing requirements are strict. Nowadays, two main design processes can be followed for embedded system design, namely, a hardware description language (e.g., VHDL) and a high-level synthesis design tool. This paper proposes the FPGA implementation of an adaptive algorithm that is robust to impulsive noise using these two approaches. Final comparison results are provided in order to test accuracy, performance, and logic occupation.