Title :
Experimental measurement and simulation of thermal performance due to aging in power semiconductor devices
Author :
Katsis, D.C. ; van Wyk, J.D.
Author_Institution :
Center for Power Electron. Syst., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
Abstract :
Power cycling in operating power semiconductors creates stresses in the device package. These stresses cause cracks to grow in the solder die-attach layer, leading to voids between the silicon and the heat spreader. The thermal performance of power semiconductor devices is eventually compromised by these voids. This study compares the thermal impedance of modules with varying void area at a constant power dissipation level in order to develop a relationship between thermal impedance and void area. The effect of aging on thermal transient behavior is then correlated to finite element thermal simulations. Conclusions about the impact of thermal performance changes due to aging are created to help designers accommodate for the growth of age-related defects and their effects on operating temperature of power semiconductor devices.
Keywords :
ageing; power semiconductor devices; semiconductor device measurement; semiconductor device models; semiconductor device packaging; semiconductor device testing; thermal analysis; thermal conductivity; device package stresses; finite element thermal simulations; operating temperature; power cycling; power semiconductor device ageing; solder die-attach layer cracks; thermal performance measurement; thermal performance simulation; thermal transient behavior; Aging; Impedance; Lead; Power dissipation; Power measurement; Power semiconductor devices; Semiconductor device measurement; Semiconductor device packaging; Silicon; Thermal stresses;
Conference_Titel :
Industry Applications Conference, 2002. 37th IAS Annual Meeting. Conference Record of the
Conference_Location :
Pittsburgh, PA, USA
Print_ISBN :
0-7803-7420-7
DOI :
10.1109/IAS.2002.1043769