Title :
FT-integrator in digital CMOS process for continuous-time ΣΔ modulator
Author :
Khumsat, Phanumas ; Worapishet, Apisak ; Burdett, Alison
Author_Institution :
Dept. of Electr. & Electron. Eng., Prince of Songkla Univ., Thailand
Abstract :
The fT-integration technique is further investigated through the use of p-n-p transistors commonly available in a mainstream digital CMOS process. Both lateral and vertical p-n-p´s have been employed in fT-integrator design. The integrator is used as a building block for a single-bit second-order lowpass continuous-time ΣΔ modulator. The modulator prototype is fabricated in a digital 0.8 μm CMOS technology and the measured results clearly confirm functionality of the proposed concept. The modulator chip operates at 320 MHz clock speed from a 3 V supply with a maximum SNDR of 32 dB and 38 dB dynamic range for a 4 MHz signal bandwidth (OSR=40).
Keywords :
CMOS integrated circuits; continuous time systems; high-speed integrated circuits; integrated circuit design; integrating circuits; mixed analogue-digital integrated circuits; modulators; sigma-delta modulation; 0.8 micron; 3 V; 320 MHz; 4 MHz; CMOS modulator chip; FT-integrator; continuous-time ΣΔ modulator; digital CMOS process; integrator building block; lateral p-n-p transistors; mixed-signal circuit design; p-n-p bipolar transistors; second-order lowpass sigma-delta modulator; transition frequency integration technique; Bandwidth; BiCMOS integrated circuits; Bipolar transistors; CMOS process; CMOS technology; Delta modulation; Differential equations; Digital modulation; Filters; MOSFET circuits;
Conference_Titel :
Electronics, Circuits and Systems, 2002. 9th International Conference on
Print_ISBN :
0-7803-7596-3
DOI :
10.1109/ICECS.2002.1045399
