A new model for metastability

Author

Haydt, Mary Sue ; Mourad, Samiha ; Terry, W. ; Terry, Janice

Author_Institution

Santa Clara Univ., CA, USA

Volume

1

fYear

2002

fDate

2002

Firstpage

413

Abstract

Metastability has been long documented as a problem in digital systems with asynchronous inputs. This problem has been analyzed in CMOS latches using a 2nd order small signal model. However, uses of a third order model taking into account that the effect of the feedback transistors is necessary for correct modeling of metastability. A new simulator was developed for this study. The results presented here show that when modeling a CMOS latch for metastability purposes, it is not sufficient to use a second order circuit that neglects the effect of the feedback transistor. The simulator can also be used to study the effect of power supply noise and applied to interconnect models to study crosstalk.

Keywords

CMOS logic circuits; asynchronous circuits; asynchronous sequential logic; circuit simulation; circuit stability; crosstalk; flip-flops; integrated circuit interconnections; integrated circuit modelling; integrated circuit noise; logic simulation; CMOS latches; asynchronous inputs; crosstalk; digital systems; feedback transistors; interconnect models; metastability; power supply noise; second order small signal model; simulator; third order model; Circuit noise; Circuit simulation; Crosstalk; Digital systems; Feedback circuits; Latches; Metastasis; Power supplies; Semiconductor device modeling; Signal analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2002. 9th International Conference on

Print_ISBN

0-7803-7596-3

Type

conf

DOI

10.1109/ICECS.2002.1045421

Filename

1045421