DocumentCode
3849886
Title
A Power Efficient Frequency Divider for 60 GHz Band
Author
Dušan Grujic;Milan Savic;Jelena Popovic-Bozovic
Author_Institution
TES Electronic Solutions, Belgrade, Serbia
Volume
21
Issue
3
fYear
2011
Firstpage
148
Lastpage
150
Abstract
Four stage injection locked ring oscillator frequency divider by 16 is presented in this letter. Test chip was fabricated in IHP 0.25 μm SiGe:C HBT BiCMOS technology (200/200 GHz fT /fMAX ). Test chip area is 0.24 mm2 with core size of only 116 × 80 μm2. Total power consumption is 23.8 mW from 3 V supply for all cores. The divider operates in a frequency range of 34 to >; 67 GHz with the input power level of -10 dBm. Very good first stage FOM value of 6.7 GHz/mW is reported.
Keywords
"Frequency conversion","Frequency measurement","BiCMOS integrated circuits","Phase noise","Semiconductor device measurement","Heterojunction bipolar transistors"
Journal_Title
IEEE Microwave and Wireless Components Letters
Publisher
ieee
ISSN
1531-1309
Type
jour
DOI
10.1109/LMWC.2010.2103357
Filename
5711681
Link To Document