DocumentCode :
3855443
Title :
Low-complexity low-density parity check decoding algorithm for high-speed very large scale integration implementation
Author :
F. Angarita;J. Marín-Roig;V. Almenar;J. Valls
Author_Institution :
Inst. de Telecomun. y Aplic. Multimedia, Univ. Politec. de Valencia, Gandia, Spain
Volume :
6
Issue :
16
fYear :
2012
fDate :
11/6/2012 12:00:00 AM
Firstpage :
2575
Lastpage :
2581
Abstract :
This study proposes a new low-complexity decoding algorithm for low-density parity check codes, which is a variation of the offset min-sum algorithm and achieves a similar performance with lower hardware cost. A finite precision study is presented and the hardware cost of the implementation of three very large scale integration architectures is evaluated. As a conclusion, the proposed algorithm achieves similar performance with an area saving of around 18, 10 and 14% for the memory-based partially parallel, fully parallel and sliced message passing implementations, respectively.
Journal_Title :
IET Communications
Publisher :
iet
ISSN :
1751-8628
Type :
jour
DOI :
10.1049/iet-com.2011.0542
Filename :
6400460
Link To Document :
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