Title :
Power-constrained microprocessor design
Author :
Hofstee, H. Peter
Author_Institution :
IBM Microelectron., Austin, TX, USA
Abstract :
Power dissipation and power density have become first-order design constraints, even for high-performance systems. For future designs it will be the dominant constraint. In this paper we suggest a systematic approach to optimizing a processor design under (only) a power constraint. The approach uses the energy-performance ratio (EPR) of the various design parameters as the key to identifying opportunities for improving energy-efficiency.
Keywords :
logic design; microprocessor chips; energy-performance ratio; first-order design constraints; high-performance systems; power density; power dissipation; power-constrained microprocessor design; processor design; Clocks; Constraint optimization; Costs; Design optimization; Energy efficiency; Microelectronics; Microprocessors; Paramagnetic resonance; Pipeline processing; Power dissipation;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
Print_ISBN :
0-7695-1700-5
DOI :
10.1109/ICCD.2002.1106740
