DocumentCode :
385667
Title :
Legacy SystemC co-simulation of multi-processor systems-on-chip
Author :
Benini, L. ; Bertozzi, D. ; Bruni, D. ; Drago, N. ; Fummi, F. ; Poncino, M.
Author_Institution :
Bologna Univ., Italy
fYear :
2002
fDate :
2002
Firstpage :
494
Lastpage :
499
Abstract :
We present a co-simulation environment for multiprocessor architectures, that is based on SystemC and allows a transparent integration of instruction set simulators (ISSs) within the SystemC simulation framework. The integration is based on the well-known concept of bus wrapper, that realizes the interface between the ISS and the simulator. The proposed solution uses an ISS-wrapper interface based on the standard gdb remote debugging interface, and implements two alternative schemes that differ in the amount of communication they require. The two approaches provide different degrees of tradeoff between simulation granularity and speed, and show significant speedup with respect to a micro-architectural, full SystemC simulation of the system description.
Keywords :
circuit simulation; computer debugging; instruction sets; multiprocessing systems; system-on-chip; Legacy SystemC cosimulation; bus wrapper; cosimulation environment; instruction set simulators; multiprocessor architectures; multiprocessor systems-on-chip; simulation granularity; standard gdb remote debugging interface; Application software; Communication channels; Communication standards; Debugging; Embedded software; Hardware; Microarchitecture; Open source software; Runtime; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
ISSN :
1063-6404
Print_ISBN :
0-7695-1700-5
Type :
conf
DOI :
10.1109/ICCD.2002.1106819
Filename :
1106819
Link To Document :
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