A low-offset high-CMRR switched-capacitor instrumentation amplifier for data acquisition applications

This paper presents a CMOS chopper instrumentation amplifier with a switched-capacitor band-pass filter. The switched-capacitor band-pass filter is employed to improve the matching between the chopping frequency and the center frequency of the band-pass filter, resulting in higher CMRR and lower offset. The combination of the band-pass filter and the peak-signal sampling approach eliminates the need for the anti-aliasing filter of the subsequent ADC and allows the sampling rate of the ADC to be reduced by a factor of 16 with minimal increase in high-frequency aliased noise. The prototype chip is fabricated in a 0.7 μm CMOS process and has an overall gain of 60.6 dB with a 5.5 kHz bandwidth and a minimum in-band CMRR of 137 dB. The input-referred noise and input offset are 17.2 nV/√(Hz) and 88.7 μV respectively. The amplifier power consumption is 11 mW at a supply voltage of 5 V.