An architectural design of a multimedia over IP (MoIP) terminal

This paper presents an architectural design of a low-cost multimedia over Internet protocol (MoIP) terminal based on H.323. The architectural design provides a way of studying low-cost MoIP terminal feasibility. Instead of designing an application specific chip, we decide to use a programmable digital signal processing (DSP) based approach. It consists of software and hardware designs on commercial off the shelf (COTS) components. The software module consists of media processing and control. The hardware part is based on the 150 MHz TMS320C6711 processor having a 900 MFLOPS capability. The preliminary design shows that real-time MoIP software needs approximately 500 MOPS because of video and audio processing needs as well as H.323 control protocol. It can be implemented in a 100 mm×100 mm board size. The power consumption is as small as 6 watt. With this design, a terminal can cost less than $250 for a quantity as few as 1000 unit. Hence a low-cost MoIP is feasible using existing COTS components.