DocumentCode :
3861881
Title :
Chaos-based random number generators. Part II: practical realization
Author :
T. Stojanovski;J. Pihl;L. Kocarev
Author_Institution :
Expert Inf. Services, Melbourne, Vic., Australia
Volume :
48
Issue :
3
fYear :
2001
Firstpage :
382
Lastpage :
385
Abstract :
This paper and its companion (see ibid., vol. 48, p. 281-88, 2001) are devoted to to the analysis of the application of a chaotic piecewise-linear one-dimensional (PL1D) map as Random Number Generator (RNG). In Part I, me have mathematically analyzed the information generation process of a class of PL1D maps. In this paper, we find optimum parameters that give an RNG with lowest redundancy and maximum margin against parasitic attractors. Further, the map is implemented in a 0.8 /spl mu/m standard CMOS process utilizing switched current techniques. Post-layout circuit simulations of the RNG indicate no periodic attractors over variations in temperature, power supply and process conditions, and maximum redundancy of 0.4%. We estimate that the output bit rate of our RNG is 1 Mbit/s, which is substantially higher than the output bit rate of RNGs available on the market.
Keywords :
"Chaos","Random number generation","Circuits","Information analysis","Temperature","Power supplies","Bit rate","Electric breakdown","Piecewise linear techniques","CMOS process"
Journal_Title :
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
Publisher :
ieee
ISSN :
1057-7122
Type :
jour
DOI :
10.1109/81.915396
Filename :
915396
Link To Document :
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