Analog decimator IC in direct-form polyphase structure

An integrated implementation of a switched-capacitor decimation filter for video specifications, using a low-sensitivity direct-form structure, is presented in this paper. It is based on the polyphase decomposition of a transfer function with unequal numerator and denominator orders, using a reduced number of opamps. It has been designed for an AMS 0.8 μm CMOS process, taking the advantages of differential OTA structures, incorporating dynamical common-mode feedback circuits, and has been carefully considered in order to reduce the non-idealities, such as charge injection and process gradients. Results, obtained by simulation with the extracted parameters, are provided in order to verify the performance of the proposed implementation.