DocumentCode :
387063
Title :
An 80ns address-date multiplex 1mb CMOS EPROM
Author :
Yoshida, Manabu ; Akaogi, T. ; Higuchi, Masanori ; Shirai, Keigo ; Tanaka, I.
Author_Institution :
Fujitsu MOS Memory and Process Divisions, Kawasaki, Japan
Volume :
XXX
fYear :
1987
fDate :
0-0 Feb. 1987
Firstpage :
70
Lastpage :
71
Abstract :
This report will cover an EPROM organized as 64K×16b. Precharging techniques achieved an access time of 80ns Light-shielded cells control switching of redundant word lines.
Keywords :
CMOS process; CMOS technology; Conducting materials; EPROM; Fuses; Manufacturing; Material storage; PROM; Transconductance; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference. Digest of Technical Papers. 1987 IEEE International
Conference_Location :
New York, NY, USA
Type :
conf
DOI :
10.1109/ISSCC.1987.1157235
Filename :
1157235
Link To Document :
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