Title :
Three phase domino logic circuit
Author :
Shakeri, Kaveh ; Meindl, James D.
Author_Institution :
Microelectron. Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
The speed and area advantage of domino logic circuits compared to static logic circuits makes them a favorite choice for the critical path of high performance processors. However they suffer from low noise margin. Noise is not scaling at the same rate as the supply voltage, and therefore new domino logic circuits are required to increase the noise margin. In this paper a new domino circuit is introduced. Simulations for a 3-input 180 nm AND gate shows that the noise margin can be increased by 62% with only 3% reduction in speed.
Keywords :
circuit noise; circuit simulation; integrated logic circuits; logic design; logic simulation; 180 nm; area advantage; high performance processor critical path; noise margin; noise scaling; simulations; speed advantage; static logic circuits; supply voltage scaling; three phase domino logic circuit; three-input AND gate; Circuit noise; Crosstalk; Delay; Logic circuits; Logic devices; Noise generators; Noise level; Noise reduction; Noise shaping; Threshold voltage;
Conference_Titel :
ASIC/SOC Conference, 2002. 15th Annual IEEE International
Print_ISBN :
0-7803-7494-0
DOI :
10.1109/ASIC.2002.1158078
