DocumentCode
387382
Title
Improving an SEU hard design using a pulsed laser
Author
Dutertre, J.M. ; Roche, F.M. ; Fouillat, P. ; Lewis, D.
Author_Institution
Lab. d´´Informatique de Robotique et de Microelectronique de Montpellier, France
fYear
2001
fDate
10-14 Sept. 2001
Firstpage
243
Lastpage
247
Abstract
The purpose of this work is to present one investigation utilizing a pulsed laser as a tool to improve the Single Event Upset tolerance of a memory cell. These results coming with a previous ion testing evaluation of the circuit allow an optimization of the design. The laser results permit a more detailed analysis of the phenomenon leading to the upset and a precise localization of the most sensitive areas. As a result the behavior verification of the design combined with the use of robust elementary blocks strengthens the hardening capabilities of the cell.
Keywords
integrated circuit design; integrated circuit modelling; integrated memory circuits; radiation hardening (electronics); SEU hard design; Single Event Upset tolerance; design optimisation; hardening capabilities; ion testing evaluation; memory cell; pulsed laser; CMOS technology; Circuit testing; Design optimization; Flip-flops; Logic; Optical design; Optical pulses; Radiation hardening; Robustness; Single event upset;
fLanguage
English
Publisher
ieee
Conference_Titel
Radiation and Its Effects on Components and Systems, 2001. 6th European Conference on
Print_ISBN
0-7803-7313-8
Type
conf
DOI
10.1109/RADECS.2001.1159287
Filename
1159287
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