Title :
"Test conditions for COTS CMOS PEMs in total dose environments"
Author_Institution :
Eng. Syst. Dept., Cranfield Univ., Swindon, UK
Abstract :
CMOS COTS PEMS with both DIL and SOIC package styles were subjected to various combinations of pre-irradiation thermal and bias conditions. (Burn in) The effect this had on total dose response was studied. The parts were subjected to DPA analysis to ensure the same die type was used in all experiments. A package dependency was seen, but thermal stress was found to be the most significant pre-radiation parameter.
Keywords :
CMOS integrated circuits; integrated circuit testing; packaging; radiation hardening (electronics); thermal stresses; COTS CMOS PEMs; DIL package; SOIC package; burn in; package dependency; pre-irradiation bias conditions; pre-irradiation thermal conditions; test conditions; thermal stress; total dose environments; Benchmark testing; CMOS logic circuits; Circuit testing; Electronics packaging; Integrated circuit packaging; Logic devices; Logic testing; Plastics; Silicon; Thermal stresses;
Conference_Titel :
Radiation and Its Effects on Components and Systems, 2001. 6th European Conference on
Print_ISBN :
0-7803-7313-8
DOI :
10.1109/RADECS.2001.1159304
