The A to Z of SoCs

Author

Bergamaschi, Reinaldo A. ; Cohn, John

Author_Institution

IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA

fYear

2002

fDate

10-14 Nov. 2002

Firstpage

791

Lastpage

798

Abstract

The exploding complexity of new chips and the ever decreasing time-to-market window are forcing fundamental changes in the way systems are designed. The advent of Systems-on-Chip (SoC) based on pre-designed intellectual-property (IP) cores has become an absolute necessity for embedded systems companies to remain competitive. Designing an SoC, however, is extremely complex, as it encompasses a range of difficult problems in hardware and software design. This paper explains a wide range of SoC issues including market drivers and trends, technology and integration aspects, early architecture definition, methodology, hardware and software design and verification techniques.

Keywords

VLSI; circuit CAD; circuit layout CAD; embedded systems; formal verification; high level synthesis; integrated circuit design; system-on-chip; timing; SoC design; architecture design; chip-level design; clock distribution; embedded systems; floorplanning; high-level design; intellectual property cores; pre-designed IP cores; signal integrity; software design; systems-on-chip; verification techniques; Application software; CMOS technology; Computer architecture; Embedded system; Hardware; Microelectronics; Paper technology; Productivity; Software design; Time to market;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Aided Design, 2002. ICCAD 2002. IEEE/ACM International Conference on

ISSN

1092-3152

Print_ISBN

0-7803-7607-2

Type

conf

DOI

10.1109/ICCAD.2002.1167622

Filename

1167622