An analysis of algorithms for microprocessor implementation of high-speed data modems

High-speed data communications over voice-band telephone lines is a research topic of increased importance today. The speed which is currently attracting most of interest is 14.4 Kbps. This paper gives a tutorial exposition of three algorithms for implementation of various functions in a 14.4 Kbps data modem: Trellis, Viterbi, and Decision-Feedback Equalization (DFE). The basic contribution of our work is in investigation of their computational complexity from the viewpoint of the implementation based on the Texas Instruments TMS320 microprocessor family. Our work is based on the earlier work of Ungerboeck [14], whose idea was to transmit N bits per signaling interval, with aⁿ⁺¹-ary QAM constellation, and modulator symbols being determined by a short constraint length convolutional encoder. We also rely on the earlier work of Monsen [5] with respect to the Decision-Feedback equalization.