FIR Lowpass filter for signal decimation with 15 MHz clock frequency

A lowpass filter with finite impulse response and internal wordwidth up to 20 bit, used as decimation filter in a delta-sigma coder will be reported. The filter operates with 15.36 MHz clock frequency and is realized as a cascade of an FIR- and an IIR-part. The FIR-part is a four-tap serial-in parallel-out transversal filter and the IIR-part consists of a series connection of three first order recursive filters. With the accumulators of this recursive structure built with carry select adders, the 20 bit addition at 15 MHz is realized without introducing further pipelining. The complete filter has been realized on a chip area of 1.9 mm²using a 2 µm effective gate length CMOS technology and static circuit techniques.