• DocumentCode
    387877
  • Title

    A high performance digital signal processor VLSI: MN 1900 series

  • Author

    Ueda, Katsuhiko ; Sakao, Takashi ; Suzuki, Takao ; Nishijima, Osamu

  • Author_Institution
    Matsushita Electric Ind. Co. Ltd., Osaka, Japan
  • Volume
    11
  • fYear
    1986
  • fDate
    31503
  • Firstpage
    2175
  • Lastpage
    2178
  • Abstract
    This paper describes a high performance digital signal processor VLSI, the MN1900 series, developed for advanced applications such as high quality bit rate reduction coding. The MN1900 series uses 2-micron double-layer aluminium CMOS technology and fabricates a powerful digital signal processing system on a silicon chip. The arithmetic unit providing high accuracy and wide dynamic range processing consists of a 20 × 20-bit multiplier, a 24-bit arithmetic and logical operation unit, and a barrel shifter. The data memory is constructed of a 16-bit × 66-word internal RAM and 16-bit × 4k-word external RAM, and the addressing mode for these RAMs is powerful. The I/O facilities contain a 2- channel DMA controller, thus avoiding troublesome I/O handling of the program. The powerful program control facilities support a nested loop program, subroutine call and three kinds of interrupts.
  • Keywords
    Aluminum; Arithmetic; Bit rate; CMOS process; CMOS technology; Digital signal processing chips; Digital signal processors; Read-write memory; Silicon; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '86.
  • Type

    conf

  • DOI
    10.1109/ICASSP.1986.1168631
  • Filename
    1168631