DocumentCode :
388105
Title :
Efficient implementation of continuous speech recognition on a large scale parallel processor
Author :
Kimbell, O. ; Cosell, Lynn ; Schwartz, Richard ; Krasner, Michael
Author_Institution :
BBN Laboratories, Cambridge, MA, USA
Volume :
12
fYear :
1987
fDate :
31868
Firstpage :
852
Lastpage :
855
Abstract :
This paper presents research into the use of large-scale parallelism for a continuous speech recognition algorithm. The algorithm, developed for the BBN Byblos system [1], uses context dependent Hidden-Markov models to achieve high recognition accuracy. The multiprocessor used in the research, the BBN ButterflyTMParallel Processor, is a shared memory, MIMD machine. The algorithm was implemented using the Uniform System software methodology, a system that simplifies parallel programming without sacrificing efficiency. The algorithm is described, highlighting those portions critical to an efficient parallel implementation. Some of the problems encountered in trying to improve efficiency are presented as well as the solutions to those problems. The algorithm is shown to achieve 79% processor utilization on a 97-node Butterfly Parallel Processor. This is equivalent to a speedup by a factor of 77 over a single processor benchmark.
Keywords :
Communication switching; Coprocessors; Hardware; Laboratories; Large-scale systems; Memory management; Microprocessors; Parallel processing; Speech recognition; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '87.
Type :
conf
DOI :
10.1109/ICASSP.1987.1169869
Filename :
1169869
Link To Document :
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