DocumentCode
388625
Title
Implementation of a full duplex 2.4 kbps LPC vocoder on a single TMS-320 microprocessor chip
Author
Bryden, Brian ; Hassanein, Hisham
Author_Institution
Communication Research Centre, Ottawa, Ontario, Canada
Volume
9
fYear
1984
fDate
30742
Firstpage
406
Lastpage
409
Abstract
With the commercial availability of high speed digital signal processors, it is now possible to implement all the linear predictive coding (LPC) tasks (excluding D-A/A-D conversion) on a single chip. In this paper, a very small, high quality, full-duplex, 10th order 2.4 kbps LPC vocoder is described. A single Texas Instruments TMS-320 microprocessor performs LPC analysis, pitch detection, synthesis, and data I/O. At the time of writing this paper, a total of 20 off-the-shelf integrated circuits were used occupying two thirds of a 14cm × 18cm wirewrap board (excluding power supply). The total power dissipation is less than 2 watts. The chip count may be reduced by a factor of two by combining the random logic on a semi-custom integrated circuit. When produced commercially, the cost of this vocoder should be considerably less than existing LPC units.
Keywords
Availability; Digital signal processors; Instruments; Integrated circuit synthesis; Linear predictive coding; Microprocessor chips; Performance analysis; Power supplies; Vocoders; Writing;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, IEEE International Conference on ICASSP '84.
Type
conf
DOI
10.1109/ICASSP.1984.1172695
Filename
1172695
Link To Document