Title : 
Optimizing the Antenna Area and Separators in Layer Assignment of Multilayer Global Routing
         
        
            Author : 
Wen-Hao Liu ; Yih-Lang Li
         
        
            Author_Institution : 
Dept. of Comput. Sci., Nat. Chiao-Tung Univ., Hsinchu, Taiwan
         
        
        
        
        
        
        
        
            Abstract : 
Traditional solutions to antenna effect, such as jumper insertion and diode insertion performed at post-route stage may produce extra vias and degrade circuit performance. Previous work suggests combining layer assignment, jumper insertion, and diode insertion together to achieve a better design quality with less additional cost. Based on our observations on global and local antenna violations, this paper proposes an antenna-safe single-net layer assignment (AS-SLA), which first enumerates all antenna-safe layer assignment solutions of a net, and then extracts the minimum-cost one for the net. AS-SLA can minimize via count and separators as well. In addition, an antenna avoidance layer assignment flow (AALA) adopting AS-SLA as its kernel not only avoids global antenna violations, but also eliminates local antenna violations. Experimental results reveal that, in 16 benchmarks, AALA can yield ten antenna-violation-free assignments, while the algorithms of other works yield no antenna-violation-free assignment. However, AALA performs about seven times slower than other antenna-aware layer assignment algorithm. Accordingly, two acceleration techniques are proposed to reduce the runtime of AALA by 57.6%.
         
        
            Keywords : 
antenna arrays; semiconductor diodes; telecommunication network routing; AALA; AS-SLA; antenna area; antenna avoidance layer assignment flow; antenna effect; antenna separators; antenna violations; antenna-safe single-net layer assignment; antenna-violation-free assignments; circuit performance; diode insertion; jumper insertion; multilayer global routing; Antennas; Logic gates; Metals; Particle separators; Pins; Routing; Wires; Antenna effect; design for manufacturability; global routing; layer assignment; separator;
         
        
        
            Journal_Title : 
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
         
        
        
        
        
            DOI : 
10.1109/TCAD.2013.2293053