DocumentCode :
38930
Title :
PushPull: Short-Path Padding for Timing Error Resilient Circuits
Author :
Yu-Ming Yang ; Jiang, Iris Hui-Ru ; Sung-Ting Ho
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
33
Issue :
4
fYear :
2014
fDate :
Apr-14
Firstpage :
558
Lastpage :
570
Abstract :
Modern IC designs are exposed to a wide range of dynamic variations. Traditionally, a conservative timing guardband is required to guarantee correct operations under the worst-case variation, thus leading to performance degradation. To remove the guardband, resilient circuits are proposed. However, the short-path padding (hold time fixing) problem in resilient circuits is far severer than conventional IC design. Therefore, in this paper, we focus on the short-path padding problem to enable the timing error detection and correction mechanism of resilient circuits. Unlike recent prior work adopts greedy heuristics with a local view, we determine the padding values and locations with a global view. Moreover, we utilize spare cells and a dummy metal to further achieve the derived padding values at physical implementation. Experimental results show that our method is promising to validate timing error-resilient circuits.
Keywords :
error detection; integrated circuit design; timing circuits; IC design; PushPull; correction mechanism; short-path padding; timing error detection; timing error resilient circuits; Capacitance; Clocks; Delays; Logic gates; Metals; Wires; Delay padding; engineering change order; hold time fixing; linear programming; resilient circuits; timing analysis;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2014.2304681
Filename :
6774533
Link To Document :
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