DocumentCode
3914
Title
Impact of FinFET Technology Introduction in the 3T1D-DRAM Memory Cell
Author
Amat, Esteve ; Almudever, C.G. ; Aymerich, N. ; Canal, Ramon ; Rubio, Albert
Author_Institution
Dept. of Electron., Univ. Politec. de Catalunya (UPC), Barcelona, Spain
Volume
13
Issue
1
fYear
2013
fDate
Mar-13
Firstpage
287
Lastpage
292
Abstract
In this paper, the 3T1D-DRAM cell based on FinFET devices is studied as an alternative to the bulk one. We observe an improvement in its behavior when IG and SG FinFETs are properly mixed, since together they provide a relevant increase in the memory circuit retention time. Moreover, our FinFET cell shows larger variability robustness, better performance at low supply voltage, and higher tolerance to elevated temperatures.
Keywords
DRAM chips; MOSFET circuits; 3T1D-DRAM memory cell; FinFET; memory circuit retention time; FinFETs; Fluctuations; Leakage current; Logic gates; Performance evaluation; Random access memory; Robustness; DRAM; FinFET; variability and temperature;
fLanguage
English
Journal_Title
Device and Materials Reliability, IEEE Transactions on
Publisher
ieee
ISSN
1530-4388
Type
jour
DOI
10.1109/TDMR.2013.2238542
Filename
6407976
Link To Document