• DocumentCode
    39176
  • Title

    Comments to "A Distributive-Transconductance Model for Border Traps in III-V/High-k MOS Capacitors"

  • Author

    Taur, Yuan ; Han-Ping Chen ; Yu Yuan ; Bo Yu

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Univ. of California, San Diego, La Jolla, CA, USA
  • Volume
    34
  • Issue
    11
  • fYear
    2013
  • fDate
    Nov. 2013
  • Firstpage
    1439
  • Lastpage
    1440
  • Abstract
    In this paper, we have found the missing factor in the derivation to the transconductance model [1] and reaffirmed that, when all the physics are taken into account, the distributed admittance model published in [2] is correct.
  • Keywords
    III-V semiconductors; MOS capacitors; high-k dielectric thin films; semiconductor device models; III-V/high-k MOS capacitors; border traps; distributed admittance model; distributive-transconductance model; Admittance; Electric potential; Electron traps; MOS capacitors; Numerical models; Semiconductor device modeling; Transconductance;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2013.2283466
  • Filename
    6620964
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=39176