DocumentCode
391886
Title
Yield enhanced layout strategies for ratio-critical analog circuits
Author
Lin, Yu ; Malik, Saqib Q. ; Geiger, Randall L.
Author_Institution
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Volume
1
fYear
2002
fDate
4-7 Aug. 2002
Abstract
A yield enhanced layout method for maximizing yield of integrated resistor networks with a fixed total area is discussed. This approach incorporates both random variations in the sheet resistance and random variations in the contact resistances. The concept of contact/sheet resistance crossover which gives the crossover between contact-resistance dominance and sheet resistance dominance is developed.
Keywords
analogue integrated circuits; contact resistance; integrated circuit layout; integrated circuit yield; contact resistances; contact-resistance dominance; fixed total area; integrated resistor networks; random variations; ratio-critical analog circuits; sheet resistance; sheet resistance dominance; yield enhanced layout strategies; Analog circuits; Capacitance; Capacitors; Contact resistance; Electric resistance; Feedback amplifiers; Integrated circuit yield; Resistors; Subspace constraints;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN
0-7803-7523-8
Type
conf
DOI
10.1109/MWSCAS.2002.1187224
Filename
1187224
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