DocumentCode :
39237
Title :
Mixed-Crossing-Avoided Escape Routing of Mixed-Pattern Signals on Staggered-Pin-Array PCBs
Author :
Kan Wang ; Sheqin Dong ; Huaxi Wang ; Qian Chen ; Tao Lin
Author_Institution :
Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing, China
Volume :
33
Issue :
4
fYear :
2014
fDate :
Apr-14
Firstpage :
571
Lastpage :
584
Abstract :
Escape routing has become a critical issue in high-speed PCB routing. Most of the previous work paid attention to either differential-pair escape routing or single-signal escape routing, but few considered them together. In this paper, a significant three-stage algorithm is proposed to solve the problem of escape routing of both differential pairs and single signals (mixed-pattern signals). First, differential pairs are preconditioned to reduce the complication of the problem. Then, a unified ILP model is used to formulate the problem and a novel Boolean coding-driven algorithm is proposed to avoid mixed crossings. Finally, a slice-based method is presented to prune the variables and speed up the algorithm. Experimental results show that the proposed method is very effective. For single-pattern escape routing, it can solve all the test cases in short time and reduce wire length and chip area by 16.1% and 15.5%, respectively. For mixed-pattern escape routing, it can increase the routability by 17.5% and reduce the wire length by 14.1% compared to a two-stage method. At the same time, the proposed method can effectively avoid mixed crossings with only a little increase on wire length. Furthermore, with slice-based speedup strategy, the method can reduce the solving time by 76.7%.
Keywords :
circuit optimisation; integer programming; linear programming; network routing; printed circuits; Boolean coding-driven algorithm; differential-pair escape routing; high-speed PCB routing; mixed-crossing-avoided escape routing; mixed-pattern signals; single-signal escape routing; slice-based method; slice-based speedup strategy; staggered-pin-array PCBs; unified ILP model; wire length reduction; Optimization; Pin arrays; Routing; Wires; Differential pair; escape routing; mixed crossing; mixed-pattern signals; single signal; staggered pin array;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2014.2301676
Filename :
6774561
Link To Document :
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