DocumentCode
394102
Title
The effect of low-k ILD on the electromigration reliability of Cu interconnects with different line lengths
Author
Hau-Riege, Christine S. ; Marathe, Amit P. ; Pham, Van
Author_Institution
Adv. Micro Devices Inc., Sunnyvale, CA, USA
fYear
2003
fDate
30 March-4 April 2003
Firstpage
173
Lastpage
177
Abstract
We have compared the electromigration performance of Cu electromigration structures with varying line lengths imbedded in two different ILD materials. In the regime of high jL where there is no significant back-stress, we observed that three of the key electromigration parameters (i.e., MTF, n, and σ) are constant and approximately equivalent between the two materials. In the regime of lower jL where there is significant back-stress, both materials exhibit similar trends, however, the Cu with low-k material performed relatively worse in terms of MTF and similarly in terms of n and σ. That is, while the MTF of Cu with both materials increased with decreasing jL, the MTF of Cu with low-k material was less than that of the Cu with SiO2-based material due to lower back-stress at a given jL. Further, while a regime of complete immortality was observed for the SiO2-based material, no regime of immortality was observed for the low-k material. The values of n and σ were comparable for both materials, and were constant in the absence of significant back-stress but increased in the presence of significant back-stress. Due to the higher MTFs in the regime of high backstress, MTF is more sensitive to j and L, thereby increasing n as per Black´s Law. The increase in σ is a consequence of heightened sensitivity to process variations such as via barrier integrity and CD variation.
Keywords
copper; dielectric thin films; electromigration; failure analysis; integrated circuit interconnections; integrated circuit reliability; silicon compounds; voids (solid); Black law; CD variation; Cu interconnects; Cu-SiO2; MTF; SiO2-based material; back-stress; electromigration parameters; electromigration reliability; line lengths; low-k ILD; process variation sensitivity; regime of immortality; via barrier integrity; Critical current density; Current density; Dielectric materials; Electromigration; Electrons; Integrated circuit interconnections; Life estimation; Microprocessors; Stress; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium Proceedings, 2003. 41st Annual. 2003 IEEE International
Print_ISBN
0-7803-7649-8
Type
conf
DOI
10.1109/RELPHY.2003.1197740
Filename
1197740
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