DocumentCode :
394178
Title :
Brainway computer implementation availability using reconfiguration
Author :
Ide, Alessandro Noriaki ; Saito, José Hiroki ; Abib, Sandra
Author_Institution :
Departamento de Computacao, Univ. Fed. de Sao Carlos, Brazil
Volume :
2
fYear :
2002
fDate :
18-22 Nov. 2002
Firstpage :
976
Abstract :
This paper describes a study of the brainway computer implementation availability. As an example of this brainway reconfigurable computer, it is proposed a digital hardware implementation of an artificial neural network, neocognitron, which represents the human neural system. This model may represent all the human brain system as the sensory information inputs, their association and actions. It is an FPGA based reconfigurable cluster-processing platform, where the whole artificial neural network is processed. It is described the architecture of each arithmetic circuit, which composes the neocognitron structure, and how they are processed. Finally, an analysis of the space occupied for each circuit is done and the processing time is measured, considering the neocognitron model applied to visual pattern recognition. In conclusion, the results showed the availability of the brainway computer: fast design hardware implementation; pipeline and parallel computations; and reconfiguration.
Keywords :
field programmable gate arrays; neural chips; neural net architecture; reconfigurable architectures; FPGA; arithmetic circuit; brainway computer; neocognitron; neural network; reconfigurable computer; Arithmetic; Artificial neural networks; Brain modeling; Circuits; Computer networks; Concurrent computing; Field programmable gate arrays; Humans; Neural network hardware; Pattern analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Neural Information Processing, 2002. ICONIP '02. Proceedings of the 9th International Conference on
Print_ISBN :
981-04-7524-1
Type :
conf
DOI :
10.1109/ICONIP.2002.1198206
Filename :
1198206
Link To Document :
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