• DocumentCode
    395581
  • Title

    A comparison of MPCP and MSRP when sharing resources in the Janus multiple-processor on a chip platform

  • Author

    Gai, Paolo ; Di Natale, Marco ; Lipari, Giuseppe ; Ferrari, Alberto ; Gabellini, Claudio ; Marceca, Paolo

  • Author_Institution
    Scuola Superiore Sant´´Anna, Pisa, Italy
  • fYear
    2003
  • fDate
    27-30 May 2003
  • Firstpage
    189
  • Lastpage
    198
  • Abstract
    The new generation of embedded systems for automotive applications can take advantage of low-cost multiprocessor system-on a chip architectures. The real-time software applications running on these systems require realtime processor scheduling, and also require the management of the communication and synchronization of tasks executing on different processors with limited blocking time. Conventional real-time technologies, like the Rate Monotonic scheduling algorithm together with the Multiprocessor Priority Ceiling Protocol (MPCP) can be used to this purpose. In earlier work, we proposed the Multiprocessor Stack Resource Policy (MSRP) for scheduling tasks and sharing resources in multiprocessor on a chip architectures. In this paper we present an experimental evaluation that compares the performance of our algorithm with a solution based on Rate Monotonic and MPCP in the con text of the Janus multiple processor architecture. The evaluation of the algorithm has been triggered by our ongoing research in the automotive domain. We report on two sets of experiments: the first addresses a range of generic task configurations to see if one of the algorithms can clearly outperform the other The results show MSRP to be better for random task periods but are probably not conclusive. Later we focus on a more application-specific (also more restrictive) architecture design representing a typical automotive application: a power-train controller In this case, MSRP clearly performs better The performance gap between the two policies can be further increased when considering that MSRP is much simpler to implement, it has a lower overhead, and it allows RAM memory optimization.
  • Keywords
    embedded systems; operating systems (computers); processor scheduling; random-access storage; resource allocation; synchronisation; system-on-chip; RAM memory optimization; embedded system; multiprocessor priority ceiling protocol; multiprocessor stack resource policy; multiprocessor system-on a chip architecture; operating system; processor scheduling; rate monotonic scheduling algorithm; real-time system; synchronization; Application software; Automotive applications; Communication system software; Computer architecture; Embedded system; Multiprocessing systems; Processor scheduling; Protocols; Real time systems; Scheduling algorithm;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Real-Time and Embedded Technology and Applications Symposium, 2003. Proceedings. The 9th IEEE
  • ISSN
    1545-3421
  • Print_ISBN
    0-7695-1956-3
  • Type

    conf

  • DOI
    10.1109/RTTAS.2003.1203051
  • Filename
    1203051