An integrated multi-scroll circuit with floating-gate MOSFETs

Author

Fujiwara, Tetsuya ; Horio, Yoshihiko ; Aihara, Kazuyuki

Author_Institution

Dept. of Electron. Eng., Tokyo Denki Univ., Japan

Volume

3

fYear

2003

fDate

25-28 May 2003

Abstract

This paper proposes a multi-scroll circuit that is fast, compact, versatile, and suitable for CMOS implementation. The circuit uses a high-Q CMOS active inductor circuit as a simulated inductor. We use parallel combinations of N-type conductance circuits with floating-gate MOSFETs to create high-order piecewise-linear negative conductances. We integrate the proposed circuit with MOSIS TSMC 0.35 μm CMOS process. HSPICE simulation results and experimental results from the prototype chip are shown.

Keywords

CMOS analogue integrated circuits; MOSFET circuits; SPICE; chaos; inductors; negative resistance circuits; piecewise linear techniques; 0.35 micron; HSPICE simulation; N-type conductance circuit; chaotic dynamics; floating-gate MOSFET; high-Q CMOS active inductor circuit; high-order piecewise-linear negative conductance; integrated multi-scroll circuit; Active inductors; CMOS process; Chaos; Circuit simulation; Computational modeling; Cryptography; MOSFETs; Resistors; Virtual prototyping; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on

Print_ISBN

0-7803-7761-3

Type

conf

DOI

10.1109/ISCAS.2003.1204985

Filename

1204985